C++research
gem5 cache research
My research fork of the gem5 simulator: experimental cache architectures, from split L2 partitions to temperature-aware replacement.
My research fork of the gem5 simulator: experimental cache architectures, from split L2 partitions to temperature-aware replacement.
A small, readable set-associative cache simulator in Python, with pluggable replacement policies and prefetchers.
Shell scripts that run the SPEC CPU 2006 benchmark suite on gem5, single-core and multi-core, with logs and a live timer.